Chip sorting apparatus
US9011638B2 · kind B2 · utility
3Cited by
14References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2014 |
| Grant date | Apr 21, 2015 |
| Priority date | — |
| Expiry date | Mar 19, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T156/1983
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of chip sorting comprises providing a chip holder having a first surface; providing multiple chips on the first surface; providing a chip receiver having a second surface, wherein the second surface faces the first surface; attaching the multiple chips to the second surface; decreasing an adhesion between the multiple chips and the first surface; and separating the multiple chips from the first surface after the step of decreasing the adhesion between the multiple chips and the first surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.