Method for providing a system on chip with power and body bias voltages
US9013228B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 21, 2014 |
| Grant date | Apr 21, 2015 |
| Priority date | — |
| Expiry date | Jan 21, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0018
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Embodiments described in the present disclosure relate to a method for providing power for an integrated system, including acts of: providing the system with power, ground and body bias voltages, the body bias voltages comprising a body bias voltage of p-channel MOS transistors, greater or lower than the supply voltage, and a body bias voltage of n-channel MOS transistors, lower or greater than the ground voltage, selecting by means of the system out of the voltages provided, depending on whether a processing unit of the system is in a period of activity or inactivity, voltages to be supplied to bias the bodies of the MOS transistors of the processing unit, and providing the bodies of the MOS transistors of the processing unit with the voltages selected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.