Semiconductor memory device
US9013939B2 · kind B2 · utility
8Cited by
9References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 28, 2012 |
| Grant date | Apr 21, 2015 |
| Priority date | — |
| Expiry date | Aug 2, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/417
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a memory cell connected to a word line and a bit line, for storing and holding data, a word line driver circuit connected to the word line, a bit line precharge circuit connected to the bit line, and a peripheral control circuit. First power supply VDD is connected to the memory cell and the peripheral control circuit, and first power supply VDD is connected to word line driver circuit and bit line precharge circuit through switching element controlled by first control signal PD.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.