Address translation for SR-IOV virtual function apertures
US9015351B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2013 |
| Grant date | Apr 21, 2015 |
| Priority date | — |
| Expiry date | Sep 26, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus having corresponding methods and computer-readable media comprise: an interface to receive a first address in a first address space for one of a plurality of resources, wherein each resource is associated with a respective first aperture in the first address space, and a respective second aperture in a second address space; and a translation module to translate the first address to a second address in the second address space; wherein the translation module includes address translation logic to swap a first sequence of bits in the first address with a second sequence of the bits in the first address; wherein a number of the bits in the second sequence is determined according to a number of the resources; and wherein a number of the bits in the first sequence is determined according to a difference between a size of the first aperture and a size of the second aperture.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.