System and method for achieving enhanced performance with multiple networking central processing unit (CPU) cores
US9015438B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2012 |
| Grant date | Apr 21, 2015 |
| Priority date | — |
| Expiry date | Jul 9, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/56
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present disclosure discloses a method and network device for achieving enhanced performance with multiple CPU cores in a network device having a symmetric multiprocessing architecture. The disclosed method allows for storing, by each central processing unit (CPU) core, a non-atomic data structure, which is specific to each networking CPU core, in a memory shared by the plurality of CPU cores. Also, the memory is not associated with any locking mechanism. In response to a data packet is received by a particular CPU core, the disclosed system will update a value of the non-atomic data structure corresponding to the particular CPU core. The data structure may be a counter or a fragment table. Further, a dedicated CPU core is allocated to process only data packets received from other CPU cores, and is responsible for dynamically responding to queries receives from a control plane process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.