Iterating inner and outer codes for data recovery
US9015549B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 26, 2011 |
| Grant date | Apr 21, 2015 |
| Priority date | — |
| Expiry date | Sep 19, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/1515
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A storage medium includes at least one data unit defining a plurality of symbol-based inner code words and a plurality of symbol-based outer code words. Each symbol included in one of the inner code words is also included in one of the outer code words. A processor is configured to perform a first iteration of inner code error correction on the plurality of symbol-based inner code words, a first iteration of outer code error correction on the plurality of symbol-based outer code words and a second iteration of inner code error correction on the plurality of symbol-based inner code words. In the first iteration of outer code error corrections, at least one of the outer code words is correctable. In the second iteration of inner code error correction, at least one of the inner code words is correctable.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.