Hierarchical electromigration analysis using intelligent connectivity
US9015645B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 24, 2013 |
| Grant date | Apr 21, 2015 |
| Priority date | — |
| Expiry date | Oct 24, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Implementations of the present disclosure involve methods and systems for performing an electromigration analysis of a microelectronic circuit design. In particular, the implementations describe provide for performing a hierarchical extraction of the design, determining an approximate positioning and connection of two or more components of the design and performing electromigration analysis on the design. In one implementation, an intelligent connectivity may be applied to the hierarchical extraction to achieve an approximate location of the connection points between the blocks of the design. In one example, the intelligent connectivity technique may utilize a coordinate grid related to the design to approximate the connection points between the blocks of the design. Thus, by combining the hierarchical extraction with an intelligent connectivity technique, an electromigration analysis of a VLSI microelectronic design may be accomplished within the limitations of the analysis tools that is more accurate than previous electromigration analysis techniques.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.