Semiconductor storage device and manufacturing method the same

US9018611B2 · kind B2 · utility

Assignee

• Kabushiki Kaisha Toshiba · JP

Inventor

• Murato Kawai · Yokkaichi, JP

Key dates

• Filing date: Aug 31, 2012
• Grant date: Apr 28, 2015
• Expiry date: Mar 3, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/826

Abstract

A semiconductor storage device according to an embodiment includes a first conductive layer, a variable resistance layer, an electrode layer, a first liner layer, a stopper layer, and a second conductive layer. The variable resistance layer is provided above the first conductive layer. The electrode layer contacts an upper surface of the variable resistance layer. The first liner layer contacts the upper surface of the electrode layer. The stopper layer contacts the upper surface of the first liner layer. The second conductive layer is provided above the stopper layer. The first liner layer is made of a material having a property for canceling an influence of an orientation of a lower layer of the first liner layer, the property of the first liner layer being superior compared with that of the stopper layer.