Sample and hold capacitance to digital converter
US9019229B2 · kind B2 · utility
2Cited by
3References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2010 |
| Grant date | Apr 28, 2015 |
| Priority date | — |
| Expiry date | Mar 4, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/43
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for converting charge measured from a touch screen into a digital signal can include a sample and hold circuit. The sample and hold circuit can sample and integrate a charge from a capacitive sense matrix, and hold a voltage signal representing the measured charge. A sigma delta converter can convert the voltage into a digital value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.