Patent · US Active

Reordering graph execution for processing optimization

US9019292B2 · kind B2 · utility

3Cited by
6References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 12, 2011
Grant dateApr 28, 2015
Priority date
Expiry dateApr 8, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06T11/40
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Methods are provided for reordering operations in execution of an effect graph by graphics processing unit. Memory availability is evaluated for storing images rendered using the effect graph. Memory is allocated for multiple parallel intermediate textures that store images. Operations that write to these textures are executed. It is then determined that there is not sufficient memory to perform additional parallel operations. The memory currently allocated is flushed, and memory for an upper-level texture is allocated. The operations that write pixels to the upper-level texture are executed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.