Display drive with permutation and superposition gray-level control
US9019322B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2010 |
| Grant date | Apr 28, 2015 |
| Priority date | — |
| Expiry date | Dec 12, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0213
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display driver circuitry with permutation and superposition gray-level control comprises a gray-level controller. The controller may comprise a permutation and superposition adder configured to divide N-bit gray-level data G into M most significant bits, serving as a superposition reference GH, and (N−M) least significant bits, serving as a superposition increment GL, and to superpose superposition values Xi onto GH to derive pieces of scan data Gi for S scan operations; an overflow bit setting unit configured to set an overflow bit F; and an output unit configured to output the scan data Gi. A display driven this way has an improved refreshing frequency with the same gray-level reproduction ability as PWM-based schemes. Further, the duration of each scan operation, or scan period, is constant, resulting in convenience in software implementations. Furthermore, the pulse width representative of the gray-level value is determined by superposition of the scan operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.