Method of forming a spacer patterning mask
US9023224B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2014 |
| Grant date | May 5, 2015 |
| Priority date | — |
| Expiry date | May 15, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3083
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure pertains to a method of forming a spacer patterning mask. The method entails: providing a substrate; depositing, on the substrate, an interface layer, a core film and a first hard mask; patterning the core film and the first hard mask to form strips; depositing a spacer patterning layer to cover the core film and the first hard mask in the intermediate pattern; planarizing the spacer patterning layer by using the first hard mask in the intermediate pattern as a stop layer; etching the planarized spacer patterning layer; dry etching the second hard mask to expose the partially-etched spacer patterning layer; dry etching the exposed spacer patterning layer to form a spacer pattern; and removing the remaining first hard mask and second hard mask and the core film to obtain the final spacer patterning mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.