Semiconductor device and manufacturing method thereof
US9024443B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2013 |
| Grant date | May 5, 2015 |
| Priority date | — |
| Expiry date | May 13, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device according to the present embodiment includes a semiconductor substrate. A lower-layer wiring is provided above a surface of the semiconductor substrate. An interlayer dielectric film is provided on the lower-layer wiring and includes a four-layer stacked structure. A contact plug contains aluminum. The contact plug is filled in a contact hole formed in the interlayer dielectric film in such a manner that the contact plug reaches the lower-layer wiring. Two upper layers and two lower layers in the stacked structure respectively have tapers on an inner surface of the contact hole. The taper of two upper layers and the taper of two lower layers have different angles from each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.