Synchronous data system and method for providing phase-aligned output data
US9025714B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2013 |
| Grant date | May 5, 2015 |
| Priority date | — |
| Expiry date | May 28, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0338
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Embodiments of a synchronous data system and method for generating phase-aligned output data are generally described herein. In some embodiments, the synchronous data system includes a plurality of transmitter-receiver (TX-RX) pairs, each associated with a delay-locked loop (DLL) and arranged to generate corresponding output data stream based on a high-speed clock of the associated TX-RX pair. The DLL associated with each TX-RX pair is a phase-shifter DLL that includes an adjustable phase shifter arranged to minimize the phase error between the system clock and the module clock to edge-align the high-speed clocks of each TX-RX pair.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.