Method and apparatus for securing configuration scan chains of a programmable device
US9026873B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 23, 2013 |
| Grant date | May 5, 2015 |
| Priority date | — |
| Expiry date | Aug 12, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318519
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Scan chain circuitry on an integrated circuit device includes a plurality of memory elements, and a plurality of control elements. Each of the control elements is located between respective ones of the plurality of memory elements for controllably connecting the plurality of memory elements into a scan chain. A plurality of respective scan enable activation elements controls a respective subplurality of the plurality of control elements for connecting a respective subplurality of the plurality of memory elements into the scan chain. Each scan enable activation element is actuated, to connect its respective subplurality of the plurality of memory elements into the scan chain, by a first enable signal common to more than one of the scan enable activation elements, and a second enable signal for that one of the scan enable activation elements. Such scan chain circuitry may be used for entering configuration data into a programmable integrated circuit device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.