Semiconductor device comprising a passive component of capacitors and process for fabrication
US9029928B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2011 |
| Grant date | May 12, 2015 |
| Priority date | — |
| Expiry date | Dec 3, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1469
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a wafer having a frontside and a backside. The wafer is formed from at least one integrated circuit chip having an electrical connection frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. A passive component including at least one conductive plate and a dielectric plate is positioned adjacent the integrated circuit chip. An encapsulation block embeds the integrated circuit chip and the passive component, the block having a frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. An electrical connection is made between the electrical connection frontside and the passive component. That electrical connection includes connection lines placed on the wafer frontside and wafer backside. The electrical connection further includes at least one via passing through the encapsulation block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.