OLED panel with partition plate
US9030384B2 · kind B2 · utility
1Cited by
0References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 23, 2013 |
| Grant date | May 12, 2015 |
| Priority date | — |
| Expiry date | Sep 18, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/353
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An OLED panel includes a plurality of pixels. Each pixel includes a first sub-pixel, a second sub-pixel and a third sub-pixel spaced from each other by a plurality of baffle plates. The first sub-pixel of each pixel is located adjacent to that of a neighboring pixel. The first sub-pixel of each pixel is spaced from that of the neighboring pixel by a partition plate. The partition plate has a height less than a height of each baffle plate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.