Three dimensional semiconductor memory device
US9030869B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2012 |
| Grant date | May 12, 2015 |
| Priority date | — |
| Expiry date | Mar 24, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A three-dimensional (3D) semiconductor memory device comprises memory cell strings each comprising at least one selection transistor and at least one memory cell, a first pass transistor group sharing a first well region and comprising a first selection line pass transistor connected to the selection transistor and a first world line pass transistor connected to the memory cell, a second pass transistor group sharing a second well region and comprising a second selection line pass transistor connected to the selection transistor, and a controller that controls the first pass transistor group and the second pass transistor group. The controller applies selected voltages to the first and second well regions during read operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.