Method and system for performing DMA in a multi-core system-on-chip using deadline-based scheduling
US9032104B2 · kind B2 · utility
2Cited by
18References
15Claims
0Family size
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Key dates
| Filing date | Sep 16, 2013 |
| Grant date | May 12, 2015 |
| Priority date | — |
| Expiry date | Nov 12, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A direct memory access (DMA) engine schedules data transfer requests of a data processing system according to both an assigned transfer priority and the deadline for completing a transfer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.