Circuit boards with vias exhibiting reduced via capacitance
US9035197B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 4, 2011 |
| Grant date | May 19, 2015 |
| Priority date | — |
| Expiry date | Oct 23, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/0242
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to circuit boards and, more specifically, circuit boards with vias (i.e. via holes) exhibiting reduced via capacitance. In one embodiment, the present invention provides a circuit board comprising a first electrically conductive trace, a second electrically conductive trace, a via hole including electrically conductive material thereon, and a coupling element that electrically connects the first trace to the second trace. The coupling element comprises a segment of the via hole that bridges the first trace and the second trace, wherein the via hole segment is a remainder of the via hole after removal of a portion of the via hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.