Patent · US Active

Three dimensional branchline coupler using through silicon vias and design structures

US9035719B2 · kind B2 · utility

6Cited by
0References
20Claims
0Family size

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Inventors

Key dates

Filing dateAug 23, 2013
Grant dateMay 19, 2015
Priority date
Expiry dateNov 13, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldTelecommunications
  • WIPO sectorElectrical engineering

Abstract

A three dimensional (3D) branchline coupler using through silicon vias (TSV), methods of manufacturing the same and design structures are disclosed. The method includes forming a first waveguide structure in a first dielectric material. The method further includes forming a second waveguide structure in a second dielectric material. The method further includes forming through silicon vias through a substrate formed between the first dielectric material and the second dielectric material, which connects the first waveguide structure to the second waveguide structure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.