Devices and methods using supervisor chips (integrated circuits) to generate time acceptance windows
US9037894B1 · kind B1 · utility
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4References
9Claims
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Key dates
| Filing date | Jan 29, 2013 |
| Grant date | May 19, 2015 |
| Priority date | — |
| Expiry date | Jan 27, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/011
- WIPO fieldOther special machines
- WIPO sectorMechanical engineering
Abstract
Timing circuits including supervisor chip(s), capacitors, and latches. The supervisor chip(s) and capacitors cooperate to generate an electrical signal (window signal) having a high logic state when the window is open. The latches are used to determine whether an event of interest occurred while the window was open using the generated window signal and an electrical signal asserted upon occurrence of the event of interest.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.