Passivation layer structure of semiconductor device and method for forming the same
US9040983B2 · kind B2 · utility
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24Claims
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Key dates
| Filing date | Oct 21, 2013 |
| Grant date | May 26, 2015 |
| Priority date | — |
| Expiry date | Oct 21, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A passivation layer structure of a semiconductor device is provided, which includes a passivation layer formed of halogen-doped aluminum oxide and disposed on a semiconductor layer on a substrate, in which the semiconductor layer includes indium gallium zinc oxide (IGZO) or nitride-based III-V compounds. A method for forming the passivation layer structure of a semiconductor device is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.