Feedback for delay lock loop
US9041445B1 · kind B1 · utility
0Cited by
3References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 20, 2014 |
| Grant date | May 26, 2015 |
| Priority date | — |
| Expiry date | Oct 20, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0898
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention is directed to signal processing system and electrical circuits. More specifically, embodiments of the present invention provide a DLL system that provides phase correction by determining a system offset based on phase differences among the delay lines. The offset is used as a part of a feedback loop to provide phase corrections for the delay lines. There are other embodiments as well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.