Sampling device with buffer circuit for high-speed ADCs
US9041573B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 2014 |
| Grant date | May 26, 2015 |
| Priority date | — |
| Expiry date | Mar 18, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/685
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A sampling and interleaving stage device for use in an analog-digital-converter and for providing a sampling output signal and an analog-to-digital-converter. The sampling and interleaving stage device for use in an analog-digital-converter, including: a receiving unit having a clock unit with a plurality of clock-driven switches for receiving an input signal; for each of the plurality of clock-driven switches, a first demultiplexer, for receiving the input signal via a clock-driven switch and for providing a number of first demultiplexer outputs; for a first demultiplexer output, at least one storage element for a stored input potential depending on the input signal; and an output demultiplexer for receiving an indication about the stored input potential and for outputting a corresponding sampling output signal to a respective sampling output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.