Non-volatile semiconductor memory device having non-volatile memory array
US9042183B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 2013 |
| Grant date | May 26, 2015 |
| Priority date | — |
| Expiry date | Sep 6, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a non-volatile semiconductor memory device which is provided with a memory cell array, bit lines, word lines, and a sense amplifier circuit is presented. The memory cell array includes memory cells. The bit lines are electrically connected to the memory cells. The word lines are electrically connected to gates of the non-volatile memory cells. The sense amplifier circuit includes sense amplifiers which are electrically connected to the bit lines. Each of the sense amplifiers includes a latch circuit which is capable of holding data, and a detection circuit. The sense amplifiers are configured to apply any one of a first voltage and a second voltage higher than the first voltage to the bit lines respectively. The sense amplifiers apply any one of the first voltage and the second voltage s a third voltage to the bit lines, and apply the third voltage to the detection circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.