Patent · US Active

Method and apparatus for detecting a parity error in a sequence of DQPSK symbols of a digital transmission system

US9043690B2 · kind B2 · utility

2Cited by

4References

15Claims

0Family size

Assignee

Huawei Technologies Co., Ltd. · CN

Inventors

Fabian Nikolaus Hauske · Birkenfeld, DE
Gerhard Bauch · Starnberg, DE
Doris Pflueger · Stuttgart, DE

Key dates

Filing date	Jun 12, 2012
Grant date	May 26, 2015
Priority date	—
Expiry date	Jan 14, 2034

Classification

Technology area (CPC H)Electricity
CPC primaryH04L27/2331
WIPO fieldDigital communication
WIPO sectorElectrical engineering

Abstract

The present disclosure relates to a method for detecting a parity error in a sequence of DQPSK symbols of a digital transmission system, comprising determining a first demodulated symbol r1; determining a second demodulated symbol r2; determining a first parity symbol p1; determining a second parity symbol p2; determining a super-parity symbol q1; and detecting a parity error in the sequence of DQPSK symbols by comparing a combination of the first parity symbol p1 and the second parity symbol p2 against the super-parity symbol q1, wherein a parity between two DQPSK symbols describes a phase difference between the two DQPSK symbols.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.