Flexible logic unit
US9048827B2 · kind B2 · utility
2Cited by
10References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2014 |
| Grant date | Jun 2, 2015 |
| Priority date | — |
| Expiry date | Jan 13, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17764
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A flexible logic unit (FLU) is targeted to be primarily, but not exclusively, used as an embedded field programmable gate array (EFPGA). The unit is comprised of a plurality of programmable building block tiles arranged in an array of columns and rows of tiles, and programmed by downloading a bit stream, done tile by tile and column by column, using latches that are sequentially programmed and locked using a lock bit as part of the bit stream provided. A scheme of odd and even clocks prevent latch transparency and ensures that once data has arrived at its destination it is properly locked, not to be unintentionally overwritten.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.