NAND flash memory interface controller with GNSS receiver firmware booting capability
US9053015B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 17, 2013 |
| Grant date | Jun 9, 2015 |
| Priority date | — |
| Expiry date | Sep 27, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An architecture of a NAND Flash memory module interface controller (NAND-controller) provides access to data stored in an external NAND Flash memory module, and a method of booting firmware. NAND-controller automatically boots firmware from the NAND Flash memory into primary RAM of a system-on-a chip used for GNSS receivers. NAND-controller has a first external interface to connect NAND Flash memory, a second external interface to set parameters of booting firmware, and two internal interfaces: a high-speed one (system interface) and a low-speed one (control interface) to be connected to two types of SoC internal busses. Data exchange between the CPU and NAND Flash memory is implemented using a static RAM buffer which is a part of the NAND-controller and available for reading and writing via high-speed interface. Parameters of the first external interface are set and current state of data exchange process is controlled by the CPU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.