Multicore computer system with cache use based adaptive scheduling
US9053029B2 · kind B2 · utility
3Cited by
1References
25Claims
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Key dates
| Filing date | Feb 6, 2012 |
| Grant date | Jun 9, 2015 |
| Priority date | — |
| Expiry date | Jul 9, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/544
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An example multicore environment generally described herein may be adapted to improve use of a shared cache by a plurality of processing cores in a multicore processor. For example, where a producer task associated with a first core of the multicore processor places data in a shared cache at a faster rate than a consumer task associated with a second core of the multicore processor, relative task execution rates can be adapted to prevent eventual increased cache misses by the consumer task.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.