Shift register unit circuit, shift register, array substrate and liquid crystal display
US9053678B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 16, 2012 |
| Grant date | Jun 9, 2015 |
| Priority date | — |
| Expiry date | Jul 8, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the disclosed technical solution provides a shift register unit circuit which operates based on two clock signals and comprises input terminals, a pre-charging circuit, a first level pulling-down circuit, a second level pulling-down circuit and a scan signal output terminal. Embodiments of the disclosed technical solution also provides a shift register having at least two shift register unit circuits connected in cascade, and further provides a liquid crystal display array substrate and a liquid crystal display. Embodiments of the disclosed technical solution settles problems that a threshold voltage of the pulling-down TFT would drift under a direct current bias voltage and a output is unstable due to a clock hopping, increases a reliability of the circuit and reduces power consumption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.