Method for the wafer-level integration of shape memory alloy wires
US9054224B2 · kind B2 · utility
2Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2011 |
| Grant date | Jun 9, 2015 |
| Priority date | — |
| Expiry date | Nov 22, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1461
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a method to attach a shape memory alloy wire to a substrate, where the wire is mechanically attached into a 3D structure on the substrate. The present invention also relates to a device comprising a shape memory alloy wire attached to a substrate, where the wire is mechanically attached into a 3D structure on the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.