Latching relay control circuitry
US9054543B2 · kind B2 · utility
0Cited by
3References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2009 |
| Grant date | Jun 9, 2015 |
| Priority date | — |
| Expiry date | Dec 21, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY04S20/20
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Electronic circuits and methods are provided for power conservation applications. A latching relay includes a controlled switch electrically coupled within a power supply of a computer or other load. Circuitry of the present teachings controls operation of the latching relay. Set and reset conditions of the latching relay establish normal and deep standby operating modes for the computer, respectively. Manual switching or automated signaling are used to assert the set and reset relay conditions. Very low power consumption is achieved during the deep standby mode of operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.