Dithering circuit for serial data transmission
US9054851B2 · kind B2 · utility
2Cited by
1References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2014 |
| Grant date | Jun 9, 2015 |
| Priority date | — |
| Expiry date | Mar 5, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/4902
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system for determining a unit time of a serial transmission protocol, wherein the serial transmission protocol defines a unit time (UT) by transmitting a calibration pulse having a predetermined length of N*UT and wherein a receiver is operated by system clock, includes: a clock divider for dividing the system dock by M, wherein M evenly divides N, and a detector for sampling a received data nibble length by using a dithered sampling clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.