Method and system for controlling a 3D processor using a control list in memory
US9058685B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 9, 2010 |
| Grant date | Jun 16, 2015 |
| Priority date | — |
| Expiry date | Feb 4, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A graphics processing device generates control lists for controlling processing of 3D graphics. Control lists comprise primitive data for the 3D graphics, pointers to primitive data and control data. Tags that correspond to records within the control lists may be utilized for the control of processing. The graphics processing device may comprise a 3D pipeline comprising parallel processors. Processing is performed on a tile by tile basis and comprises a tile binning phase and/or a tile rendering phase. The two phases of processing may be performed in parallel on different sets of data. Control lists comprise a main list and/or sub-lists, for example, tile lists. Control lists may comprise links to other lists. Processing control may advance through the control lists without interaction from a driver and/or from a processor that is external to the graphics processing device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.