Thin film transistor, thin film transistor array panel, and method of manufacturing a thin film transistor array panel
US9059046B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2012 |
| Grant date | Jun 16, 2015 |
| Priority date | — |
| Expiry date | Oct 16, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/423
Abstract
A thin film transistor array panel according to an exemplary embodiment of the invention includes: a substrate; a gate line positioned on the substrate and including a gate electrode; a gate insulating layer positioned on the gate line; an oxide semiconductor layer positioned on the substrate; a source electrode and a drain electrode positioned on the oxide semiconductor layer; a first insulating layer positioned on the source electrode and the drain electrode and including a first contact hole; a data line positioned on the first insulating layer and intersecting the gate line; and a pixel electrode over the first insulating layer. The source electrode and the drain electrode each comprise a metal oxide. The data line is electrically connected to the source electrode through the first contact hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.