Metal-oxide-semiconductor (MOS) device and method for fabricating the same
US9059202B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 30, 2011 |
| Grant date | Jun 16, 2015 |
| Priority date | — |
| Expiry date | Apr 23, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
Abstract
A Metal-Oxide-Semiconductor (MOS) device is disclosed. The MOS device includes a substrate, a well region formed in the substrate, and a gate located on the substrate. The MOS device also includes a first lightly-doped region arranged in the well region at a first side of the gate and overlapping with the gate, and a second lightly-doped region arranged in the well region at a second side of the gate and overlapping with the gate. Further, the MOS device includes a first heavily-doped region formed in the first lightly-doped region, and a second heavily-doped region formed in the second lightly-doped region. The MOS device also includes a first high-low-voltage gate oxide boundary arranged between the first heavily-doped region and the gate, and a second high-low-voltage gate oxide boundary arranged between the second heavily-doped region and the gate. The gate covers the first high-low-voltage gate oxide boundary and the second high-low-voltage gate oxide boundary at the first side and the second side of the gate, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.