Systems and methods for verifying model equivalence
US9063672B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2011 |
| Grant date | Jun 23, 2015 |
| Priority date | — |
| Expiry date | Feb 28, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for verifying model equivalence are provided. In one implementation, a system includes: a memory device that stores a reference model (RM) and comparison model (CM), wherein the CM and the RM are constrained by a set of rules; and a processing unit that generates a reference model representation (RMR) from the RM and stores the RMR on the memory device; the processing unit further generates a comparison model representation (CMR) from the comparison model (CM) and stores the CMR on the memory device, wherein the processing unit further to: verifies that the CMR compatibly implements the RMR; verifies that a CM data flow diagram derived from the CMR compatibly implements a RM data flow diagram derived from the RMR; and verifies that every CM semantic unit implements a behavior that corresponds to a RM semantic unit and every RM semantic unit is accounted for in the CM.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.