Patent · US Active

Stacking devices at finished package level

US9064716B2 · kind B2 · utility

0Cited by
25References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 30, 2009
Grant dateJun 23, 2015
Priority date
Expiry dateSep 7, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/19107
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

An embodiment is a method and apparatus to stack devices. A first finished package level (FPL) device having a first grounded tested die (GTD) is reduced to nearly size of the first GTD. The first FPL has a first plurality of solder balls. The reduced first FPL device is attached to a first substrate to form a first device assembly.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.