Reduced pin full feature load switch
US9065435B1 · kind B1 · utility
1Cited by
0References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2013 |
| Grant date | Jun 23, 2015 |
| Priority date | — |
| Expiry date | Jun 19, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0054
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A four pin integrated circuit MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) load switch is disclosed that provides full features including adjustable ramp time/rate, adjustable discharge time/rate, temperature control, over-current control, and short circuit protection. In some embodiments, the adjustable ramp is based on the voltage or current input into the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.