High-speed divide-by-1.5 circuit with 50 percent duty cycle
US9065449B2 · kind B2 · utility
2Cited by
9References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 28, 2013 |
| Grant date | Jun 23, 2015 |
| Priority date | — |
| Expiry date | Nov 22, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1565
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A divide-by-1.5 circuit includes a divide-by-3 circuit that and a frequency doubler circuit. The divide-by-3 circuit has few logic elements and provides glitch-free operation with a 50 percent duty cycle output. The frequency doubler circuit is based on phase-locked loop circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.