Patent · US Active

Integrated power-on-reset circuit

US9065451B2 · kind B2 · utility

0Cited by

11References

14Claims

0Family size

Assignee

Nordic Semiconductor ASA · NO

Inventor

Carsten Wulff · Trondheim, NO

Key dates

Filing date	Dec 13, 2013
Grant date	Jun 23, 2015
Priority date	—
Expiry date	Dec 13, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH03K17/223
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An integrated power-on reset circuit comprises a resistor and a capacitor, wherein the resistor is arranged to pass a current by quantum tunneling in order to charge the capacitor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.