Frequency synthesis and noise reduction
US9065458B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2011 |
| Grant date | Jun 23, 2015 |
| Priority date | — |
| Expiry date | Jul 20, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03B21/04
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A frequency synthesizer and oscillator are disclosed for reducing noise in processed signals. The synthesizer and oscillator comprise an array of frequency dividers adapted to receive an input signal, which is derived from a single signal source having a prescribed frequency. The synthesizer and oscillator further comprise at least one frequency multiplier coupled to at least one of the frequency dividers, such that in use, the dividers and the at least one multiplier are operable to generate a plurality of frequencies which are coherent with the prescribed frequency. A regulated power supply is also disclosed comprising a filter and first and second regulators, for reducing noise in the output voltage of the power supply.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.