Multi-function reconfigurable delta sigma DAC
US9065472B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2015 |
| Grant date | Jun 23, 2015 |
| Priority date | — |
| Expiry date | Mar 5, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An interleaved digital to analog converter (DAC) includes at least a first signal path and a second signal path. The DAC further includes at least a first high speed DAC and a second high speed DAC each having an input and an output. The first signal path and the second signal path are electrically coupled to the first high speed DAC input and the second high speed DAC input, respectively. The DAC also includes a zero phase clock signal supplied to the first high speed DAC and a 180° phase shifted clock signal supplied to the second high speed DAC. A summation circuit, having at least two inputs and one output, is coupled to the outputs of the first high speed DAC and the second high speed DACs. A high-pass delta sigma modulator, a low-pass delta sigma modulator, a band pass delta sigma modulator, or notch filter delta sigma modulator is coupled between the first signal path and the first high speed DAC. A second a high-pass delta sigma modulator, a second low-pass delta sigma modulator, a second band pass delta sigma modulator, or a second notch filter delta sigma modulators electrically coupled between the second signal path and the second high speed DAC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.