Systems and methods for destaging storage tracks from cache
US9069683B2 · kind B2 · utility
0Cited by
8References
20Claims
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Key dates
| Filing date | Jan 17, 2014 |
| Grant date | Jun 30, 2015 |
| Priority date | — |
| Expiry date | Jan 17, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0804
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes a cache and a processor coupled to the cache. The cache stores data in multiple storage tracks and each storage track includes an associated multi-bit counter. The processor is configured to perform the following method. One method includes incrementing the multi-bit counter on each respective storage track a predetermined amount each time the processor writes to a respective storage track. The method further includes decrementing each multi-bit counter each scan cycle, and destaging each storage track including a zero count.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.