Semiconductor device including polysilicon resistor and metal gate resistor and methods of fabricating thereof
US9070624B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2011 |
| Grant date | Jun 30, 2015 |
| Priority date | — |
| Expiry date | Sep 16, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A described method includes providing a semiconductor substrate. A first gate structure is formed on the semiconductor substrate and a sacrificial gate structure formed adjacent the first gate structure. The sacrificial gate structure may be used to form a metal gate structure using a replacement gate methodology. A dielectric layer is formed overlying the first gate structure and the sacrificial gate structure. The dielectric layer has a first thickness above a top surface of the first gate structure and a second thickness, less than the first thickness, above a top surface of the sacrificial gate structure. (See, e.g., FIGS. 5, 15, 26). Thus, a subsequent planarization process of the dielectric layer may not contact the first gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.