Digital duty cycle correction circuit
US9071237B2 · kind B2 · utility
15Cited by
13References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2014 |
| Grant date | Jun 30, 2015 |
| Priority date | — |
| Expiry date | Mar 13, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1565
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital duty cycle correction circuit includes a duty cycle controller and a digital duty control code generator. The duty cycle controller generates first and second output clock signals by compensating duty cycles of first and second input clock signals based on a digital duty control code. The digital duty control code generator generates the digital duty control code based on a frequency value obtained by converting duty cycle information of the first output clock signal and the second output clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.