Phase locked loop and associated phase alignment method
US9071255B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2012 |
| Grant date | Jun 30, 2015 |
| Priority date | — |
| Expiry date | Jul 30, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase locked loop and an associated alignment method are provided. A disclosed phase locked loop receives a reference signal to provide a feedback signal. The phase locked loop is first opened. When the phase locked loop is open, a frequency range of an oscillating signal from a voltage-controlled oscillator is substantially selected. The feedback signal is provided according to the oscillation signal. After the frequency range is selected, the phase locked loop is kept open and the phases of the reference signal and the feedback signal are substantially aligned. The phase locked loop is then closed after the reference signal and the feedback signal are aligned.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.