Patent · US Active

Timestamp estimation and jitter correction using downstream FIFO occupancy

US9071554B2 · kind B2 · utility

2Cited by
0References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 15, 2013
Grant dateJun 30, 2015
Priority date
Expiry dateSep 20, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L47/564
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

First, a packet may be received and a timestamp value may be placed on the packet. The timestamp value may comprise a place time value comprising a time when the timestamp was placed on the packet plus a delay time value comprising an estimated time delay between when the timestamp was placed on the packet and when the packet leaves a port exit. Next, the packet may be sent to a first in first out (FIFO) memory. The packet may then be sent from the FIFO memory out the port exit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.