Patent · US Active

Utility and lifetime based cache replacement policy

US9075746B2 · kind B2 · utility

1Cited by
2References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 23, 2011
Grant dateJul 7, 2015
Priority date
Expiry dateJun 5, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/502
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Embodiments of the invention describe an apparatus, system and method for utilizing a utility and lifetime based cached replacement policy as described herein. For processors having one or more processor cores and a cache memory accessible via the processor core(s), embodiments of the invention describe a cache controller to determine, for a plurality of cache blocks in the cache memory, an estimated utility and lifetime of the contents of each cache block, the utility of a cache block to indicate a likelihood of use its contents, the lifetime of a cache block to indicate a duration of use of its contents. Upon receiving a cache access request resulting in a cache miss, said cache controller may select one of the cache blocks to be replaced based, at least in part, on one of the estimated utility or estimated lifetime of the cache block.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.